Altium

Design Rule Verification Report

Date: 8/12/2022
Time: 3:48:32 PM
Elapsed Time: 00:00:01
Filename: C:\Users\daniel.sigg\Documents\Protel\RF\RFSource\VCXOPart\VCXOPart.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=10mil) (All),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=10mil) (Max=100mil) (Preferred=15mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Minimum Annular Ring (Minimum=10mil) (All) 0
Minimum Annular Ring (Minimum=6mil) (HasFootprint('YY161-ALT') or HasFootprint('SOT-89-PL019') or HasFootprint('BomarSiTime')) 0
Minimum Annular Ring (Minimum=8mil) (IsVia) 0
Hole Size Constraint (Min=10mil) (Max=125mil) (All) 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0mil) (All),(All) 0
Silk To Solder Mask (Clearance=1mil) (IsPad),(All) 0
Silk to Silk (Clearance=8mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All) 0
Component Clearance Constraint ( Horizontal Gap = -1000mil, Vertical Gap = 10mil ) (InComponent('LOGO1')),(InAnyComponent) 0
Component Clearance Constraint ( Horizontal Gap = -1000mil, Vertical Gap = 10mil ) (InComponent('T1')),(InComponent('R11')) 0
Component Clearance Constraint ( Horizontal Gap = -1000mil, Vertical Gap = 10mil ) (InComponent('U4')),(InComponent('R7')) 0
Component Clearance Constraint ( Horizontal Gap = -1000mil, Vertical Gap = 10mil ) (InComponent('U4')),(InComponent('R6')) 0
Component Clearance Constraint ( Horizontal Gap = 10mil, Vertical Gap = 10mil ) (All),(All) 0
Component Clearance Constraint ( Horizontal Gap = -1000mil, Vertical Gap = 10mil ) (InComponent('U2')),(InComponent('U3')) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total 0