Altiumcustomize

Design Rule Verification Report

Date : 8/6/2013
Time : 12:54:33 PM
Elapsed Time : 00:00:01
Filename : C:\Rich's Files\Mycadfiles\ISC\Whitening Interface Split Board\WhiteningInterfaceSplit_v2.PcbDoc
Warnings : 0
Rule Violations : 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=20mil) ((InNet('GND') AND OnLayer('Bottom Layer (H)'))),(All) 0
Room ISC Whitening InterfaceSplit_v2 (Bounding Region = (8695mil, 16920mil, 8895mil, 17290mil) (Disabled)(InComponentClass('ISC Whitening InterfaceSplit_v2')) 0
Net Antennae (Tolerance=0mil) (All) 0
Silk to Silk (Clearance=10mil) (All),(All) 0
Silkscreen Over Component Pads (Clearance=2mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=8mil) (All),(All) 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Hole Size Constraint (Min=1mil) (Max=200mil) (All) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Width Constraint (Min=10mil) (Max=100mil) (Preferred=15mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Clearance Constraint (Gap=10mil) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Total 0