Altium

Design Rule Verification Report

Date	:	5/11/2012
Time	:	3:57:47 PM
Elapsed Time	:	00:00:01
Filename	:	C:\Rich's Files\Mycadfiles\R_and_D\Laser_current_driver\Laser Diode Driver v2.PcbDoc

Summary

Warnings	Count
Total	0

Rule Violations	Count
Room Laser Diode Driver v2 (Bounding Region = (14955mil, 17975mil, 15175.866mil, 18230mil) (InComponentClass('Laser Diode Driver v2'))	0
Net Antennae (Tolerance=0mil) (All)	0
Silk to Silk (Clearance=10mil) (All),(All)	1
Silkscreen Over Component Pads (Clearance=5mil) (All),(All)	4
Minimum Solder Mask Sliver (Gap=5mil) (All),(All)	14
Hole To Hole Clearance (Gap=10mil) (All),(All)	0
Hole Size Constraint (Min=14mil) (Max=200mil) (All)	0
Height Constraint (Min=0mil) (Max=2000mil) (Prefered=500mil) (All)	0
Width Constraint (Min=10mil) (Max=100mil) (Preferred=20mil) (All)	0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)	0
Clearance Constraint (Gap=10mil) (All),(All)	0
Un-Routed Net Constraint ( (All) )	0
Short-Circuit Constraint (Allowed=No) (All),(All)	0
Total	19

Room Laser Diode Driver v2 (Bounding Region = (14955mil, 17975mil, 15175.866mil, 18230mil) (InComponentClass('Laser Diode Driver v2'))

Net Antennae (Tolerance=0mil) (All)

Silk to Silk (Clearance=10mil) (All),(All)
Text "R42" (5625mil,195mil) Top Overlay	Track (5569.567mil,319.567mil)(5640.433mil,319.567mil) Top Overlay

Silkscreen Over Component Pads (Clearance=5mil) (All),(All)
Track (4432.283mil,47.717mil)(4432.283mil,362.677mil) Top Overlay	Pad P1-2(4400.787mil,280mil) Multi-Layer
Track (3967.716mil,47.717mil)(3967.716mil,362.677mil) Top Overlay	Pad P1-2(3999.213mil,280mil) Multi-Layer
Track (5432.283mil,47.717mil)(5432.283mil,362.677mil) Top Overlay	Pad P2-2(5400.787mil,280mil) Multi-Layer
Track (4967.717mil,47.717mil)(4967.717mil,362.677mil) Top Overlay	Pad P2-2(4999.213mil,280mil) Multi-Layer

Minimum Solder Mask Sliver (Gap=5mil) (All),(All)
Pad R42-2(5605mil,405mil) Multi-Layer	Pad R42-1(5605mil,355mil) Multi-Layer
Pad R42-3(5605mil,455mil) Multi-Layer	Pad R42-2(5605mil,405mil) Multi-Layer
Pad R52-2(6875mil,405mil) Multi-Layer	Pad R52-1(6875mil,355mil) Multi-Layer
Pad R52-3(6875mil,455mil) Multi-Layer	Pad R52-2(6875mil,405mil) Multi-Layer
Pad C45-1(6180mil,480.118mil) Top Layer	Pad Free-20(6180mil,540mil) Multi-Layer
Pad R37-2(4450mil,684.882mil) Top Layer	Pad Free-30(4450mil,625mil) Multi-Layer
Pad C34-2(4859.882mil,1075mil) Top Layer	Pad Free-37(4865mil,1015mil) Multi-Layer
Pad U8-4(4229.685mil,975.512mil) Top Layer	Pad Free-40(4265mil,975.512mil) Multi-Layer
Pad R29-1(4105mil,1349.882mil) Top Layer	Pad Free-41(4165mil,1350mil) Multi-Layer
Pad R30-1(4179.764mil,2355mil) Top Layer	Pad Free-50(4120mil,2355mil) Multi-Layer
Pad C8-1(1285.118mil,2880mil) Top Layer	Pad Free-66(1285mil,2820mil) Multi-Layer
Pad U13-3(5720mil,2669.488mil) Top Layer	Pad Free-81(5720mil,2740mil) Multi-Layer
Via (775mil,1875mil) Top Layer to Bottom Layer	Pad R9-2(775mil,1815.118mil) Top Layer
Via (885mil,1875mil) Top Layer to Bottom Layer	Pad C6-2(885mil,1815.236mil) Top Layer

Hole To Hole Clearance (Gap=10mil) (All),(All)

Hole Size Constraint (Min=14mil) (Max=200mil) (All)

Height Constraint (Min=0mil) (Max=2000mil) (Prefered=500mil) (All)

Width Constraint (Min=10mil) (Max=100mil) (Preferred=20mil) (All)

Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)

Clearance Constraint (Gap=10mil) (All),(All)

Un-Routed Net Constraint ( (All) )

Short-Circuit Constraint (Allowed=No) (All),(All)