Altiumcustomize

Design Rule Verification Report

Date : 7/30/2012
Time : 1:36:46 PM
Elapsed Time : 00:00:01
Filename : C:\Rich's Files\Mycadfiles\ISC\AdL_RFPD\2011_aLIGO_LSC\2011_aligo_LSC_v5\aLIGO_LSC.PcbDoc
Warnings : 0
Rule Violations : 0

Summary

Warnings Count
Total 0

Rule Violations Count
Net Antennae (Tolerance=0mil) (All) 0
Silk to Silk (Clearance=5mil) (All),(All) 0
Silkscreen Over Component Pads (Clearance=5mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=6mil) (All),(All) 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Hole Size Constraint (Min=1mil) (Max=1000mil) (All) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Width Constraint (Min=7mil) (Max=100mil) (Preferred=10mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Clearance Constraint (Gap=10mil) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Room aLIGO_LSC_pd_v5 (Bounding Region = (6503mil, 7819mil, 6557mil, 7851mil) (Disabled)(InComponentClass('aLIGO_LSC_pd_v5')) 0
Total 0